The gate-drain breakdown voltage of a GaAs MESFET is one of the most important factors limiting the maximum output power of the MESFET. Many prior methods to increase the breakdown voltage, such as a double gate recess and increased gate-drain spacing, are often accompanied by lower RF gain and/or drain saturation current. Attempts to increase the gate-drain breakdown voltage by placing an insulator between the gate metal and the MESFET channel usually introduce undesirable interface states.
Recently, GaAs MISFETs with a low interface-state density were realized using a high-resistivity low-temperature-grown GaAs layer as the gate insulator. In a conventional gate MESFET, the high-resistivity low-temperature-grown GaAs layer is deposited and then etched to allow the deposition of source, drain and gate metal contacts. The major problem with this method is that a gap remains between the sides of the metal contacts and the high-resistivity low-temperature-grown GaAs layer which substantially reduces the breakdown voltage of the MESFET.
In an attempt to solve this problem, the gate metal was deposited so as to overlap the high-resistivity low-temperature-grown GaAs layer. However, the overlap gate process is difficult and complicated and requires a critical alignment and wet etching process and is not, therefore, easily manufacturable, especially for sub-micron gate dimensions.
It would be desirable, therefore, to devise a method of fabricating high breakdown voltage MESFETs which is relatively easily manufacturable.
It is a purpose of the present invention to provide a method of fabricating high breakdown voltage MESFETs which is relatively easily manufacturable.
It is a further purpose of the present invention to provide a method of fabricating high breakdown voltage MESFETs which eliminates any critical processing steps.
It is a still further purpose of the present invention to provide a method of fabricating high breakdown voltage MESFETs which includes the formation of stable source, drain and gate contacts.